A configuration has been disclosed that performs reception processing by means of direct discrete time sampling of a high-frequency signal with the aim of achieving small size and low power consumption of a receiver and integrating the analog signal processing section and digital signal processing section (see Patent Literature 1 and Non-Patent Literature 1, for example).
FIG. 1 shows the overall configuration of a sampling circuit disclosed in Patent Literature 1 and Non-Patent literature 1. FIG. 2 is a timing chart showing control signals inputted to the sampling circuit shown in FIG. 1. The sampling circuit shown in FIG. 1 performs frequency conversion on a received analog RF signal using a multi-tap direct sampling mixer to obtain a discrete time analog signal. To be more specific, electrical charge transfer between capacitors included in the sampling circuit in FIG. 1 realizes filter characteristics resulting in the product of an FIR (finite impulse response) filer and an IIR (infinite impulse response) filter. Characteristics around the passband are determined based on second-order IIR filter characteristics. FIG. 3A and FIG. 3B show examples of wideband frequency characteristics and narrowband frequency characteristics nearby the passband in the sampling circuit in FIG. 1.